A Process-Aware Memory Compact-Device Model Using Long-Short Term Memory

With the immense increase in processing data during scaling down of semiconductor devices by Moore's Law, it is urgent need to use analytics meet state art performance both manufacturing and device compact modeling. In particular, managing fabrication cost promptly providing models, especially for new or emerging devices, challenging. To ease out these issues, we propose a unified, general-purpose, process-aware machine learning (ML) based model (CM) resistive random-access memory (RRAM), same methodology can be used any with hysteresis. A long short-term (LSTM) ML fit RRAM current-voltage (I-V) characteristics. The memorizing capability LSTM ensures one low resistance (LRS) high (HRS). fitted dataset on fabricated samples using TaN/HfO 2 /Pt/Ti/SiO /Si structure. resultant fitting error 0.0096 sinusoidal wave input voltage 0.0148 random walk sequences. demonstration, post-oxide annealing from 300°C 500°C. root mean squared (RMSE) 0.0028. Thus, LSTM-based CM has potential compete conventional models terms shorter developing time, better large number easily incorporated unified accounting LRS HRS ensuring differentiability. We that useful intelligent manufacturing, process tuning, simulation program integrated circuit emphasis (SPICE) modeling simulation.